S25FS256SAGNFI001 is a FS-S flash non-volatile memory using MIRRORBIT™ technology - that stores two data bits in each memory array transistor, eclipse architecture - that dramatically improves program and erase performance, 65-nm process lithography. The S25FS-S family connects to a host system via a serial peripheral interface (SPI). This multiple width interface is called SPI multi-I/O or MIO. In addition, this is double data rate (DDR) read commands for QIO and QPI that transfer address and read data on both edges of the clock. The FS-S Eclipse architecture features a page programming buffer that allows up to 512bytes to be programmed in one operation, resulting in faster effective programming and erase than prior generation SPI program or erase algorithms.