CY7C1041GN30-10ZSXIT is a high-performance CMOS fast static RAM organized as 256K words by 16bits. Data writes are performed by asserting the Chip Enable (active-low CE) and Write Enable (active-low WE) inputs LOW, while providing the data on I/O0 through I/O15 and address on A0 through A17 pins. The Byte High Enable (active-low BHE) and Byte Low Enable (active-low BLE) inputs control write operations to the upper and lower bytes of the specified memory location. BHE controls I/O8 through I/O15 and BLE controls I/O0 through I/O7. Data reads are performed by asserting the Chip Enable (active-low CE) and Output Enable (active-low OE) inputs LOW and providing the required address on the address lines. Read data is accessible on the I/O lines (I/O0 through I/O15). Byte accesses can be performed by asserting the required byte enable signal (active-low BHE or active-low BLE) to read either the upper byte or the lower byte of data from the specified address location.