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MC100LVEL91DWG - NXP MC9S08QE8CWJ

MC100LVEL91DWG

Active
ON Semiconductor

LVPECL INPUT TO -3.3V TO -5V ECL OUTPUT, LV FAMILY, 3 INPUT, 50 MA, 620 PS, 3 V TO 3.8 V, SOIC-20

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MC100LVEL91DWG - NXP MC9S08QE8CWJ

MC100LVEL91DWG

Active
ON Semiconductor

LVPECL INPUT TO -3.3V TO -5V ECL OUTPUT, LV FAMILY, 3 INPUT, 50 MA, 620 PS, 3 V TO 3.8 V, SOIC-20

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Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTube 1$ 10.79
10$ 9.75
38$ 9.30
114$ 7.71
266$ 7.03
532$ 6.58
1026$ 5.90
NewarkEach 25$ 7.48
76$ 6.78
114$ 6.03
266$ 5.83

Description

General part information

100LVEL91 Series

The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives standard or low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential -3.3 V to -5.0 V ECL output signals. (For translation from 5.0 V PECL to -5 V ECL output, see MC100EL91.)To accomplish the level translation the LVEL91 requires three power rails. The VCCsupply should be connected to the positive supply, and the VEEpin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEEand VCCshould be bypassed to ground via 0.01 µF capacitors.Under open input conditions, the Dbar input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability.The VBBpin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBBas a switching reference voltage. VBBmay also rebias AC coupled inputs. When used, decouple VBBand VCCvia a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBBshould be left open.

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