Technical Specifications
Parameters and characteristics commom to parts in this series
| Specification | MC100EP32DG | 100EP32 Series |
|---|---|---|
| - | - | |
| Count Rate | 4 GHz | 4 GHz |
| Logic Type | Divide-by-2 | Divide-by-2 |
| Mounting Type | Surface Mount | Surface Mount |
| Number of Bits per Element | 1 | 1 |
| Number of Elements | 1 | 1 |
| Operating Temperature [Max] | 85 °C | 85 °C |
| Operating Temperature [Min] | -40 °C | -40 °C |
| Package / Case | 8-SOIC | 8-VFDFN Exposed Pad, 8-MSOP, 8-TSSOP, 8-SOIC |
| Package / Case | - | 0.118 in |
| Package / Case | - | 3 mm |
| Package / Case [x] | 0.154 in | 0.154 in |
| Package / Case [y] | 3.9 mm | 3.9 mm |
| Reset | Asynchronous | Asynchronous |
| Supplier Device Package | 8-SOIC | 8-DFN (2x2), 8-TSSOP, 8-SOIC |
| Trigger Type | Negative, Positive | Negative, Positive |
| Voltage - Supply [Max] | 5.5 V | 5.5 V |
| Voltage - Supply [Min] | 3 V | 3 V |
100EP32 Series
CLOCK DIVIDER BUFFER 1-OUT 1-IN 1:1 8-PIN DFN EP T/R
| Part | Supplier Device Package | Trigger Type | Voltage - Supply [Max] | Voltage - Supply [Min] | Mounting Type | Number of Bits per Element | Reset | Logic Type | Package / Case | Count Rate | Number of Elements | Operating Temperature [Max] | Operating Temperature [Min] | Package / Case [custom] | Package / Case | Package / Case [y] | Package / Case [x] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ON Semiconductor MC100EP32MNR4G | 8-DFN (2x2) | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-VFDFN Exposed Pad | 4 GHz | 1 | 85 °C | -40 °C | ||||
ON Semiconductor MC100EP32DTR2G | 8-TSSOP | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-MSOP, 8-TSSOP | 4 GHz | 1 | 85 °C | -40 °C | 0.118 in | 3 mm | ||
ON Semiconductor MC100EP32DR2G | 8-SOIC | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-SOIC | 4 GHz | 1 | 85 °C | -40 °C | 3.9 mm | 0.154 in | ||
ON Semiconductor MC100EP32DTG | 8-TSSOP | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-MSOP, 8-TSSOP | 4 GHz | 1 | 85 °C | -40 °C | 0.118 in | 3 mm | ||
ON Semiconductor MC100EP32DT | 8-TSSOP | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-MSOP, 8-TSSOP | 4 GHz | 1 | 85 °C | -40 °C | 0.118 in | 3 mm | ||
ON Semiconductor MC100EP32DR2 | 8-SOIC | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-SOIC | 4 GHz | 1 | 85 °C | -40 °C | 3.9 mm | 0.154 in | ||
ON Semiconductor MC100EP32DTR2 | 8-TSSOP | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-MSOP, 8-TSSOP | 4 GHz | 1 | 85 °C | -40 °C | 0.118 in | 3 mm | ||
ON Semiconductor MC100EP32DG | 8-SOIC | Negative, Positive | 5.5 V | 3 V | Surface Mount | 1 | Asynchronous | Divide-by-2 | 8-SOIC | 4 GHz | 1 | 85 °C | -40 °C | 3.9 mm | 0.154 in | ||
ON Semiconductor MC100EP32DTR2 REEL |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
Description
General part information
100EP32 Series
The MC100EP32DG is an integrated ECL ÷2 Divider with differential CLK inputs. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01μF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VBB should be left open. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state, the reset allows for the synchronization of multiple EP32's in a system. The 100 series contains temperature compensation.
Documents
Technical documentation and resources