S25FL512SAGMFV010 is a SPI multi-I/O, 3.0V 512Mb (64 MB) FL-S flash memory. This device connects to a host system via an SPI. Traditional SPI single-bit serial input and output (Single I/O or SIO) is supported as well as optional two-bit (Dual I/O or DIO) and four-bit (Quad I/O or QIO) serial commands. This multiple-width interface is called SPI Multi-I/O or MIO. In addition, the FL-S family adds support for Double Data Rate (DDR) read commands for SIO, DIO, and QIO that transfer address and read data on both edges of the clock. The Eclipse architecture features a Page Programming Buffer that allows up to 256 words (512 bytes) to be programmed in one operation, resulting in faster effective programming and erasing than prior generation SPI programs or erase algorithms. It offers high densities coupled with the flexibility and fast performance required by a variety of embedded applications. It is ideal for code shadowing, XIP, and data storage.