| Series | Category | # Parts | Status | Description |
|---|---|---|---|---|
| Logic ICs | 4 | 1 | The 74AHC1G126; 74AHCT1G126 is a single buffer/line driver with 3-state output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. | |
| Logic ICs | 4 | 1 | The 74AHC1G126; 74AHCT1G126 is a single buffer/line driver with 3-state output. Inputs are overvoltage tolerant. This feature allows the use of these devices as translators in mixed voltage environments. | |
Nexperia74AHCT244 | Integrated Circuits (ICs) | 1 | 1 | |
Nexperia74ALVC08 | Gates and Inverters | 2 | 8 | |
| Logic ICs | 3 | 1 | The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. | |
| Logic ICs | 3 | 1 | The 74ALVC14 is a hex inverter with Schmitt-trigger inputs. | |
Nexperia74ALVC16245 | Logic | 1 | 1 | |
| Buffers / Inverters / Transceivers | 2 | 1 | The 74ALVC541 is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the associated outputs to assume a high-impedance OFF-state. | |
| Buffers / Inverters / Transceivers | 2 | 1 | The 74ALVC541 is an 8-bit buffer/line driver with 3-state outputs. The device features two output enables (OE1 andOE2). A HIGH onOEn causes the associated outputs to assume a high-impedance OFF-state. | |
| Logic ICs | 3 | 1 | The 74ALVC74 is a dual positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q andQoutputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and... Read More | |